The present invention relates to a semiconductor device fabrication process and more particularly to an evaluation method of a resist coating in a semiconductor lithography process.
Currently, optical lithography technology using a reduction projection exposure apparatus is employed in the fabrication process of semiconductor devices or the like.
Optical lithography mainly comprises the steps of resist application, exposure, development and baking. The resist application step is particularly important. A well-controlled formation of fine patterns by optical lithography requires a uniformly applied Spin Coat of a resist on a substrate surface.
FIG. 6(a) is a perspective view of a prior art method for applying a resist and FIG. 6(b) is a sectional view of a resist applied on a semiconductor substrate.
In a manner shown in FIG. 6(a), resist 101 is dropped from a nozzle 102 onto a semiconductor substrate (a wafer) 100, and the semiconductor substrate 100 is revolved by means of a spinner. Thereby, a uniformly applied spin coat can be obtained on the semiconductor substrate for a simple case. However, if a semiconductor substrate has thereon a ridge 103 (such as wiring, as shown in the example of FIG. 6(b)), resist locally accumulates at a particular region neighboring ridge 103 depending on the spinner revolution speed and the resist viscosity or the like. This local accumulation results in a non-uniform coat over the ridge. In FIG. 6(a) and (b), an arrow A indicates a flow direction of resist and another arrow S indicates a revolution direction.
In preparation for the subsequent pattern exposure step, the semiconductor substrate 100 is aligned with a photomask (omitted from the drawing) which is to be placed on the substrate. The alignment mark on the substrate 100 is optically detected and, in response, an electric signal is generated. The above alignment is conducted in accordance with the electric signal, so that the photomask and substrate 100 are accurately positioned relative to each other. Then, the resist is exposed and developed selectively to form a pattern of resist 101.
If the aforementioned non-uniform coat takes place and is subject to these pattern exposure steps, the non-uniform coat lowers the alignment accuracy between the photomask and substrate 100. This insufficient alignment accuracy results in an insufficient dimensional accuracy of a formed resist pattern. FIG. 7(a) and (b) show an undesirable example, in which resist 101 is non-uniformly applied over a ridge (i.e. an alignment mark 103A), and a detection signal wave form 104 is asymmetrically deformed. Therefore, the non-uniform coat of FIG. 7(a) causes an erroneous detection of the alignment mark and, accordingly, an undesirable deviation 105 in positioning a photomask over the substrate.
On the basis of this background, there is a need for the resist coating method to be optimized in order to prevent a non-uniform resist coating over a ridge from occurring. However, there are no satisfactory methods hitherto to evaluate quantitatively an applied resist coating. With respect to the prior art methods to evaluate the uniformity of resist applied on a semiconductor substrate, one method employs thickness measurement making use of an optical interference, and another method employs a mechanical means to bring a small needle in contact with a semiconductor substrate and to scan it. The former method has a drawback that the location of the measurement point is limited within a scope of an object lens of a microscope, which does not allow a measurement of a resist thickness difference between the ridge top and the depression to be measured. Thus, the accurate evaluation of the resist coat non-uniformity is interrupted. The latter method has a drawback that a finite diameter of a needle end used for the ridge measurement makes it impracticable to measure resist film thicknesses at the ridge top and the depression of the fine pattern. Moreover, the contact type arrangement is likely to damage the resist.